Fin recess last process for FinFET fabrication

摘要

A method includes forming isolation regions extending from a top surface of a semiconductor substrate into the semiconductor substrate, and forming a hard mask strip over the isolation regions and a semiconductor strip. The semiconductor strip is between two neighboring ones of the isolation regions. A dummy gate strip is formed over the hard mask strip. A lengthwise direction of the dummy gate strip is perpendicular to a lengthwise direction of the semiconductor strip, and a portion of the dummy gate strip is aligned to a portion of the semiconductor strip. The method further includes removing the dummy gate strip, removing the hard mask strip, and recessing first portions of the isolation regions that are overlapped by the removed hard mask strip. A portion of the semiconductor strip between and contacting the removed first portions of the isolation regions forms a semiconductor fin.

主权项

1. A method comprising:
forming isolation regions extending from a top surface of a semiconductor substrate into the semiconductor substrate;
forming a hard mask strip layer over and contacting the isolation regions and a semiconductor strip, wherein the semiconductor strip is between two neighboring ones of the isolation regions; forming a dummy gate strip layer over the hard mask strip layer; patterning the hard mask strip layer and the dummy gate strip layer using a same etching mask to form a hard mask strip and a dummy gate strip, respectively; recessing second portions of the isolation regions un-covered by the dummy gate strip; forming a gate spacer on a sidewall of the dummy gate strip, wherein an edge of the gate spacer is in physical contact with an edge of the isolation regions, wherein the gate spacer extends below a top surface of the semiconductor strip; removing the dummy gate strip; removing the hard mask strip; and recessing first portions of the isolation regions that are overlapped by the removed hard mask strip, wherein a portion of the semiconductor strip between and contacting the recessed first portions of the isolation regions forms a semiconductor fin.