Refresh hidden eDRAM memory

摘要

A first data access request to a first row of a first memory array of the DRAM is received while a refresh operation in the first memory array is executing. The refresh operation is paused. The first data access request is executed, and simultaneously, the bits of the first row of the first memory array, including any updates indicated in the first data access request, are latched to a transfer register. The bits latched to the transfer register are written to a corresponding first row in a second memory array of the DRAM. A bank select logic is updated to indicate that subsequent data access requests to the first row in the first memory array will be executed from the second memory array. The refresh operation is then resumed.

主权项

1. A method of operating a DRAM, comprising:
receiving a first data access request to a first row of a first memory array of the DRAM while a refresh operation in the first memory array is executing; pausing the refresh operation; executing the first data access request, and simultaneously latching the bits of the first row of the first memory array, including any updates indicated in the first data access request, to a transfer register; writing the bits latched to the transfer register to a corresponding first row in a second memory array of the DRAM; updating a bank select logic to indicate that subsequent data access requests to the first row in the first memory array will be executed from the second memory array; and resuming the refresh operation.