发明名称 Package process of backside illumination image sensor
摘要 In a package process of backside illumination image sensor, a wafer including a plurality of pads is provided. A first carrier is processed to form a plurality of blind vias therein. The first carrier is adhered to the wafer so that the blind vias face to the pads correspondingly. A spacing layer is formed and a plurality of sensing components are disposed. A second carrier is adhered on the spacing layer. Subsequently, a carrier thinning process is performed so that the blind vias become the through holes. An insulating layer is formed on the first carrier. An electrically conductive layer is formed on the insulating layer and filled in the though holes to electrically connect to the pads. The package process can achieve the exact alignment of the through holes and the pads, thereby increasing the package efficiency and improving the package quality.
申请公布号 US9281332(B2) 申请公布日期 2016.03.08
申请号 US201213668245 申请日期 2012.11.03
申请人 XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY 发明人 Chang Wen-Hsiung
分类号 H01L27/146 主分类号 H01L27/146
代理机构 代理人
主权项 1. A method of processing a wafer, the method comprising: forming a plurality of through holes within a first carrier, wherein the first carrier includes a front surface and a rear surface opposite the front surface, and wherein the plurality of through holes penetrate the front surface and the rear surface, including: forming an oxide layer on the front surface of the first carrier;removing a portion of the oxide layer to expose a portion of the front surface of the first carrier; andforming one of the plurality of through holes in the first carrier within an area of the front surface exposed by said removing a portion of the oxide layer; adhering the front surface of the first carrier to a first surface of a wafer so that the formed plurality of through holes face a plurality of respective pads formed on the wafer and expose the plurality of respective pads therefrom; forming a spacing layer on a second surface of the wafer, wherein the spacing layer includes an open region to expose the second surface therefrom; disposing a plurality of optical components in the open region, wherein the spacing layer comprises a patterned adhesive layer that extends farther from the second surface of the wafer than the plurality of optical components; adhering a second carrier to the spacing layer; and thinning the wafer prior to said forming a spacing layer, wherein said thinning the wafer includes: grinding the second surface of the wafer to form a grinding surface; and etching the grinding surface.
地址 Wilmington DE US