发明名称 A/D converter
摘要 An A/D converter includes a delta-sigma processing circuit for A/D conversion by delta-sigma modulation, and a cyclic processing circuit for A/D conversion by cyclic processing of amplification of a residue generated in the A/D conversion. The A/D converter further includes a quantization part for outputting a quantized value of quantized output of the delta-sigma processing circuit and a quantized output of the cyclic processing circuit, and a control circuit for generating an A/D conversion result and switching over a reference voltage based on the quantized value. The delta-sigma processing circuit and the cyclic processing circuit include a sampling capacitor, an integration capacitor and a capacitive D/A converter, which includes a DAC capacitor and add and subtract a charge corresponding to a reference voltage to and from a residue of quantization. The sampling capacitor, the DAC capacitor and the integration capacitor are provided as electrically separate capacitors.
申请公布号 US9281837(B2) 申请公布日期 2016.03.08
申请号 US201514819767 申请日期 2015.08.06
申请人 DENSO CORPORATION 发明人 Nezuka Tomohiro
分类号 H03M3/00;H03M1/12;H03M1/00 主分类号 H03M3/00
代理机构 Posz Law Group, PLC 代理人 Posz Law Group, PLC
主权项 1. An A/D converter comprising: a delta-sigma processing circuit for receiving an analog input signal for A/D conversion of the analog input signal by delta-sigma processing of delta-sigma modulation; a cyclic processing circuit for A/D converting, by cyclic processing, a difference between an amplified residue of quantization generated in the A/D conversion and a reference voltage; a quantization circuit for outputting a quantized value of a quantized output of the delta-sigma circuit and a quantized output of the cyclic processing circuit; and a control circuit for generating an A/D conversion result of the analog input signal based on the quantized value and outputting a control signal for switching over the reference voltage, wherein the delta-sigma processing circuit and the cyclic processing circuit include an operational amplifier forming an operation circuit, sampling capacitors, a capacitive D/A converter having a DAC capacitor for adding and subtracting the residue of quantization based on the reference voltage corresponding to the control signal, the delta-sigma processing circuit includes an integration capacitor used for the delta-sigma processing and the cyclic processing, and the sampling capacitors, the DAC capacitor and the integration capacitor are provided to be electrically separated.
地址 Kariya JP