| 摘要 |
PROBLEM TO BE SOLVED: To provide an error correction decoder in which the input speed to a decoder is adjusted not to decrease extremely, without increasing the number of signal wiring for input to the decoder extremely, or an error correction decoder in which the output speed from a decoder is adjusted not to decrease extremely, without increasing the number of signal wiring for output from the decoder extremely.SOLUTION: A decoder 5 decodes N input data in parallel to generate K decoded data. A S/P converter 6 outputs the N input data, inputted in series, to the decoder 5 via first wirings L1-L64, while dividing into multiple times. A P/S converter 7 receives the K decoded data from the decoder 5, while dividing into multiple times, via second wirings R1-R60, and outputs the K decoded data in series to the outside.SELECTED DRAWING: Figure 1 |
