MULTI-BIT FLIP-FLOP WITH ENHANCED FAULT DETECTION

摘要

A processing system includes a processor core, a peripheral component, and a flip-flop unit in at least one of the processor core and the peripheral component. The flip-flop unit can include a master latch, and two slave latches coupled to an output of the master latch. The first slave latch is formed over a first doped well region of a semiconductor substrate. The second slave latch is formed over a second doped well region of the semiconductor substrate. A comparator is coupled to an output of the first slave latch and to an output of the second slave latch. An output of the comparator indicates whether a state stored in the first slave latch is the same as a state stored in the second slave latch.

主权项

1. A processing system, comprising:
a processor core; a peripheral component; a flip-flop unit in at least one of the processor core and the peripheral component, the flip-flop unit including:
a master latch;a first slave latch coupled to an output of the master latch, wherein the first slave latch is formed over a first doped well region of a semiconductor substrate;a second slave latch coupled to the output of the master latch, wherein the second slave latch is formed over a second doped well region of the semiconductor substrate; anda comparator coupled to an output of the first slave latch and to an output of the second slave latch, wherein an output of the comparator indicates whether a state stored in the first slave latch is the same as a state stored in the second slave latch.