| 发明名称 |
III-NITRIDE TRANSISTOR WITH ENHANCED DOPING IN BASE LAYER |
| 摘要 |
A vertical trench MOSFET comprising: a N-doped substrate of a III-N material; and an epitaxial layer of the III-N material grown on a top surface of the substrate, a N-doped drift region being formed in said epitaxial layer; a P-doped base layer of said III-N material, formed on top of at least a portion of the drift region; a N-doped source region of said III-N material; formed on at least a portion of the base layer; and a gate trench having at least one vertical wall extending along at least a portion of the source region and at least a portion of the base layer; wherein at least a portion of the P-doped base layer along the gate trench is a layer of said P-doped III-N material that additionally comprises a percentage of aluminum. |
| 申请公布号 |
US2016064555(A1) |
申请公布日期 |
2016.03.03 |
| 申请号 |
US201414471980 |
申请日期 |
2014.08.28 |
| 申请人 |
HRL LABORATORIES LLC. |
发明人 |
CHU Rongming |
| 分类号 |
H01L29/78;H01L29/66;H01L29/205;H01L29/778;H01L29/423;H01L29/20 |
主分类号 |
H01L29/78 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A vertical trench MOSFET comprising:
a N-doped substrate of a III-N material; and an epitaxial layer of the III-N material grown on a top surface of the substrate, a N-doped drift region being formed in said epitaxial layer; a P-doped base layer of said III-N material, the base layer being formed on top of at least a portion of the drift region; a N-doped source region of said III-N material; the source region being formed on at least a portion of the base layer; and a gate trench having at least one vertical wall extending along at least a portion of the source region and at least a portion of the base layer; wherein at least a portion of the P-doped base layer along the gate trench is a layer of said P-doped III-N material that additionally comprises a percentage of aluminum. |
| 地址 |
MALIBU CA US |
