发明名称 SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
摘要 A semiconductor device or the like with a novel structure that can change the orientation of the display is provided. A semiconductor device or the like with a novel structure, in which a degradation in transistor characteristics can be suppressed, is provided. A semiconductor device or the like with a novel structure, in which operation speed can be increased, is provided. A semiconductor device or the like with a novel structure, in which a dielectric breakdown of a transistor can be suppressed, is provided. The semiconductor device or the like has a circuit configuration capable of switching between a first operation and a second operation by changing the potentials of wirings. By switching between these two operations, the scan direction is easily changed. The semiconductor device is configured to change the scan direction.
申请公布号 US2016064424(A1) 申请公布日期 2016.03.03
申请号 US201514841759 申请日期 2015.09.01
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 UMEZAKI Atsushi
分类号 H01L27/12;H01L29/786 主分类号 H01L27/12
代理机构 代理人
主权项 1. A semiconductor device comprising: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor, and a ninth transistor, wherein one of a source and a drain of the first transistor is electrically connected to a first wiring, wherein the other of the source and the drain of the first transistor and one of a source and a drain of the second transistor are electrically connected to a second wiring, wherein the other of the source and the drain of the second transistor, one of a source and a drain of the third transistor, and one of a source and a drain of the fifth transistor are electrically connected to a third wiring, wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the first transistor, wherein one of a source and a drain of the fourth transistor is electrically connected to a fourth wiring, wherein the other of the source and the drain of the fourth transistor and the other of the source and the drain of the fifth transistor are electrically connected to at least one of a gate of the second transistor and a gate of the third transistor, wherein one of a source and a drain of the sixth transistor and one of a source and a drain of the eighth transistor are electrically connected to a fifth wiring, wherein a gate of the sixth transistor is electrically connected to a sixth wiring, wherein one of a source and a drain of the seventh transistor and one of a source and a drain of the ninth transistor are electrically connected to a seventh wiring, wherein a gate of the seventh transistor is electrically connected to an eighth wiring, wherein a gate of the eighth transistor is electrically connected to a ninth wiring, wherein a gate of the ninth transistor is electrically connected to a tenth wiring, wherein the other of the source and the drain of the sixth transistor and the other of the source and the drain of the seventh transistor are electrically connected to a gate of the fourth transistor, and wherein the other of the source and the drain of the eighth transistor and the other of the source and the drain of the ninth transistor are electrically connected to the gate of the first transistor.
地址 Atsugi-shi JP