INTERCONNECT AND METHOD OF MANAGING A SNOOP FILTER FOR AN INTERCONNECT

摘要

An interconnect and method of managing a snoop filter within such an interconnect are provided. The interconnect is used to connect a plurality of devices, including a plurality of master devices where one or more of the master devices has an associated cache storage. The interconnect comprises coherency control circuitry to perform coherency control operations for data access transactions received by the interconnect from the master devices. In performing those operations, the coherency control circuitry has access to snoop filter circuitry that maintains address-dependent caching indication data, and is responsive to a data access transaction specifying a target address to produce snoop control data providing an indication of which master devices have cached data for the target address in their associated cache storage. The coherency control circuitry then responds to the snoop control data by issuing a snoop transaction to each master device indicated by the snoop control data, in order to cause a snoop operation to be performed in their associated cache storage in order to generate snoop response data. Analysis circuitry then determines from the snoop response data an update condition, and upon detection of the update condition triggers performance of an update operation within the snoop filter circuitry to update the address-dependent caching indication data. By subjecting the snoop response data to such an analysis, it is possible to identify situations where the caching indication data has become out of date, and update that caching indication data accordingly, this giving rise to significant performance benefits in the operation of the interconnect.

主权项

1. An interconnect for connecting devices, the devices including a plurality of master devices, one or more of the master devices having associated cache storage, the interconnect comprising:
coherency control circuitry to perform coherency control operations for data access transactions received by the interconnect from the master devices; snoop filter circuitry to maintain address-dependent caching indication data and, responsive to a data access transaction specifying a target address, to produce snoop control data providing an indication of which master devices have cached data for the target address in their associated cache storage; the coherency control circuitry being responsive to said snoop control data to issue a snoop transaction to each master device indicated by the snoop control data, in order to cause a snoop operation to be performed in their associated cache storage in order to generate snoop response data; and analysis circuitry to determine from the snoop response data an update condition, and upon detection of said update condition to trigger performance of an update operation within the snoop filter circuitry to update the address-dependent caching indication data.