发明名称 COUPLING OF AN INTERPOSER TO A PACKAGE SUBSTRATE
摘要 An integrated circuit chip stack and a method for forming the same in which bond pads of an interposer are directly bonded to bond pads of a package substrate using only pre-solder. The interposer can have a bond pad pitch of less than 150 micrometers. The interposer can be an organic interposer. The pro-solder can be melted to make contact with the bond pads of the package substrate and the interposer. After solidifying, the pre-solder can form an electrical connection between a bond pad of the interposer and a bond pad of the package substrate.
申请公布号 US2016064320(A1) 申请公布日期 2016.03.03
申请号 US201414470670 申请日期 2014.08.27
申请人 Cisco Technology, Inc. 发明人 Li Li;Nagar Mohan R.;Savic Jovica
分类号 H01L23/498;H01L23/00;H01L25/065 主分类号 H01L23/498
代理机构 代理人
主权项 1. A method for forming an integrated circuit (IC) package, comprising: providing an interposer that includes a first surface and a second surface opposite the first surface, wherein the first surface includes a first plurality of bond pads, and wherein the second surface includes a second plurality of bond pads; providing a package substrate that includes a third surface and a fourth surface opposite the third surface, wherein the third surface includes a third plurality of bond pads with pre-solder arranged thereon; attaching electrical connections on at least one IC chip to the first plurality of bond pads on the first surface of the interposer; directly contacting the second plurality of bond pads on the second surface of the interposer to the pre-solder on the third plurality of bond pads on the third surface of the package substrate; and soldering the second plurality of bond pads to the third plurality of bond pads using the pre-solder.
地址 San Jose CA US