发明名称 CONFIGURABLE SYNCHRONIZED PROCESSING OF MULTIPLE OPERATIONS
摘要 A system includes operational circuit blocks associated with configurable counter circuits. A configurable counter circuit is configured to control event signal when counting expires and includes a mode input configured to receive a setting of a programmable control event asynchronous mode and a programmable control event synchronous mode. Depending on the programmed mode and whether a control event has occurred in a previous synchronization period, the configurable counter circuit processes an associated operation responsive to issuance of a synchronization instruction or to issuance of a subsequent control event.
申请公布号 US2016062945(A1) 申请公布日期 2016.03.03
申请号 US201414473541 申请日期 2014.08.29
申请人 Microsoft Corporation 发明人 Chhodavdia Avdhesh;Fenton Michael S.;Nayak Sheethal Somesh
分类号 G06F15/78 主分类号 G06F15/78
代理机构 代理人
主权项 1. A method comprising: programming one or more configurable counter circuits, each configurable counter circuit controlling at least one operation processing in an operational circuit block during a synchronization period; processing at least one operation of an operational circuit block after expiration of the synchronization period, if a configurable counter circuit associated with the at least one operation is set for a programmable control event asynchronous mode and the associated configurable counter circuit issued a control event signal during the synchronization period; delaying processing of the at least one operation of the operational circuit block until issuance of a new control event signal after the synchronization period if the associated configurable counter circuit is set for a programmable control event synchronous mode orif the associated configurable counter circuit is set for the programmable control event asynchronous mode and the associated configurable counter circuit has not issued a control event signal during the synchronization period.
地址 Redmond WA US