发明名称 METHOD OF DESIGNING LAYOUT OF INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE INTEGRATED CIRCUIT
摘要 A method of designing a layout of an integrated chip (IC) includes designing a first layout by place and route a plurality of standard cells that define the IC, and generating a second layout by modifying the first layout during a mask data preparation process related to the first layout, wherein the second layout is generated by connecting first and second patterns from among first layer patterns that correspond to a first layer of the first layout, such that the number of masks necessary for forming the first layer patterns is reduced.
申请公布号 KR20160023542(A) 申请公布日期 2016.03.03
申请号 KR20150030551 申请日期 2015.03.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 BAEK, SANG HOON;SONG, TAE JOONG;OH, SANG KYU;LEE, SEUNG YOUNG
分类号 H01L27/02;H01L29/06 主分类号 H01L27/02
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