CLASS D AMPLIFIER CIRCUIT

摘要

This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).

主权项

1. A Class D amplifier circuit for receiving a digital input signal and outputting an analog output signal comprising:
a class-D output stage; a digital modulator for generating at least one control signal for controlling said class-D output stage based on a modulator input signal; an error block for generating an error signal based on said output signal and said digital input signal; a signal selector block configured to receive the error signal at a first input, receive a version of the digital input signal at a second input and generate the modulator input signal; wherein:
said signal selector block is operable in a first mode and a second mode of operation, wherein:
in the first mode the modulator input signal is based at least in part on the error signal; andin the second mode the modulator input signal is based on the digital input signal and is independent of the error signal; and a signal selection controller configured to control the mode of operation of the signal selector block based on an indication of the amplitude of the digital input signal.