| 发明名称 |
Method for Integrated Circuit Patterning |
| 摘要 |
A method includes forming a resist over a substrate, resulting in a layer of resist scum between the resist and the substrate. The method further includes forming trenches in the resist, wherein at least a portion of the layer of resist scum remains between the trenches and the substrate. The method further includes forming a first material layer in the trenches, wherein the first material layer has a higher etch resistance than the resist in an etching process. The method further includes performing the etching process to the first material layer, the resist, and the layer of resist scum, thereby forming a patterned first material layer over a patterned layer of resist scum over the substrate. |
| 申请公布号 |
US2016064240(A1) |
申请公布日期 |
2016.03.03 |
| 申请号 |
US201514934350 |
申请日期 |
2015.11.06 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Huang Tsung-Min;Wu Chien-Han;Lee Chung-Ju;Shih Chih-Tsung;Chen Jeng-Horng;Yu Shinn-Sheng |
| 分类号 |
H01L21/308;H01L21/02;H01L21/027 |
主分类号 |
H01L21/308 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method, comprising:
forming a resist over a substrate, resulting in a layer of resist scum between the resist and the substrate; forming trenches in the resist, wherein at least a portion of the layer of resist scum remains between the trenches and the substrate; forming a first material layer in the trenches, wherein the first material layer has a higher etch resistance than the resist in an etching process; and performing the etching process to the first material layer, the resist, and the layer of resist scum, thereby forming a patterned first material layer over a patterned layer of resist scum over the substrate. |
| 地址 |
Hsin-Chu TW |
