| 摘要 |
A single-inductor positive and negative voltage output device for reducing the area of a chip and satisfying the application requirement that positive and negative voltage output load currents are mutually independent, comprising an inductor L; one end of the inductor L is connected to the drain electrodes of both a first PMOS power switch tube M1 and a third NMOS power switch tube M3, and the other end of the inductor L is connected to the drain electrode of a second NMOS power switch tube M2 and the source electrode of a fourth PMOS power switch tube M4 respectively; the gate electrodes of M1, M2, M3 and M4 are respectively connected to a drive circuit (1); the source electrode of M1 is connected to a power source end VIN; the source electrode of M2 is connected to a grounding end (6); the source electrode of M3 is connected to a negative voltage output end VON; the drain electrode of M4 is connected to a positive voltage output end VOP; the negative voltage output end VON is grounded via a negative end capacitor CON; the positive voltage output end VOP is grounded via a positive end capacitor COP; and the positive voltage output end VOP is connected to the drive circuit (1) via a positive end feedback circuit and a logic control circuit (15), and the negative voltage output end VON is connected to the drive circuit (1) via a negative end feedback circuit and the logic control circuit (15). |
