发明名称 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME
摘要 A printed wiring board includes an insulating layer including insulating material, and a conductor layer formed on a surface of the insulating layer and including conductor pads and conductor patterns such that the conductor pads are positioned to connect one or more electronic components and that the conductor patterns are formed between the conductor pads. The conductor patterns are formed such that each conductor pattern has a pattern width of 3 μm or less and that the conductor patterns have a pattern interval of 3 μm or less between adjacent conductor patterns, and the insulating layer has recess portions formed on the surface between the conductor patterns at least along the conductor patterns such that the recess portions have a depth in a range of 0.1 μm to 2.0 μm relative to a contact interface at which the conductor patterns and the insulating layer are in contact with each other.
申请公布号 US2016066423(A1) 申请公布日期 2016.03.03
申请号 US201514841923 申请日期 2015.09.01
申请人 IBIDEN CO., LTD. 发明人 SAKAMOTO Hajime;TAKAHASHI Nobuya
分类号 H05K1/11;H05K3/10;H05K3/00;H05K1/14 主分类号 H05K1/11
代理机构 代理人
主权项 1. A printed wiring board, comprising: an insulating layer comprising an insulating material; and a conductor layer formed on a surface of the insulating layer and comprising a plurality of conductor pads and a plurality of conductor patterns such that the plurality of conductor pads is positioned to connect at least one electronic component and that the plurality of conductor patterns is formed between the conductor pads, wherein the plurality of conductor patterns is formed such that each of the conductor patterns has a pattern width of 3 μm or less and that the conductor patterns have a pattern interval of 3 μm or less between adjacent conductor patterns, and the insulating layer has a plurality of recess portions formed on the surface between the conductor patterns at least along the conductor patterns such that the plurality of recess portions has a depth in a range of 0.1 μm to 2.0 μm relative to a contact interface at which the conductor patterns and the insulating layer are in contact with each other.
地址 Ogaki-shi JP