| 摘要 |
Provided is a shift register configured by cascade-connecting unit circuits 11 each including a compensation circuit 21. The compensation circuit 21 applies an overshoot potential Vos (compensation potential) that is lower than a low level potential to an additional output terminal Z, when a second reset signal R2 outputted from a second next stage unit circuit becomes a high level. To a gate terminal of a TFT T8 (output reset transistor), a signal outputted from the additional output terminal Z included in a next stage unit circuit is supplied. Selectively applying a high level potential and a compensation potential of a polarity opposite to the high level potential to the gate terminal of the TFT T8 allows to reduce a threshold voltage shift of the TFT T8 and to prevent a reset time of the output signal from becoming long over time. |
