发明名称 SIMDベクトルの同期
摘要 A vector compare-and-exchange operation is performed by: decoding by a decoder in a processing device, a single instruction specifying a vector compare-and-exchange operation for a plurality of data elements between a first storage location, a second storage location, and a third storage location; issuing the single instruction for execution by an execution unit in the processing device; and responsive to the execution of the single instruction, comparing data elements from the first storage location to corresponding data elements in the second storage location; and responsive to determining a match exists, replacing the data elements from the first storage location with corresponding data elements from the third storage location.
申请公布号 JP5876458(B2) 申请公布日期 2016.03.02
申请号 JP20130240725 申请日期 2013.11.21
申请人 インテル・コーポレーション 发明人 ラジェワラ、ラヴィ;フォアシス、アンドリュー ティ.
分类号 G06F9/52;G06F15/167 主分类号 G06F9/52
代理机构 代理人
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