Compound semiconductor integrated circuit and method to fabricate same

摘要

A structure includes a substrate having a surface and a first transistor disposed in a first region supported by the surface of the substrate. The first transistor has a channel formed in a first compound (Group III-V) semiconductor having a first energy bandgap. The structure further includes a second transistor disposed in a second region supported by the substrate. The second transistor has a channel formed in a second compound (Group III-V) semiconductor having a second energy bandgap that is larger than the first energy bandgap. In one embodiment the first compound semiconductor is a layer that overlies a first portion of the surface of the substrate and the substrate is the second compound semiconductor. In another embodiment the second compound semiconductor is provided as a second layer that overlies a second portion of the surface of the substrate. Methods to form the structure are also disclosed.

主权项

1. A method performed during fabrication of an integrated circuit, comprising:
providing a compound semiconductor substrate comprising a compound semiconductor material comprising a Group III-V compound semiconductor material having a large bandgap energy, the large bandgap energy being greater than about 1 eV, the compound semiconductor substrate having a top surface, and the top surface having a first portion and a second portion positioned laterally adjacent to and level with the first portion; forming a compound semiconductor layer immediately adjacent to the second portion of the top surface of the compound semiconductor substrate, the compound semiconductor layer comprising an additional compound semiconductor material having a small bandgap energy, the small bandgap energy being smaller than the large bandgap energy; and forming a first transistor and a second transistor,
the first transistor being formed so as to have a first channel positioned laterally between first source and drain regions and a first gate on the first channel, the first channel and the first source and drain regions being entirely within the compound semiconductor substrate immediately below the first portion of the top surface, andthe second transistor being formed so as to have a second channel positioned laterally between second source and drain regions and a second gate on the second channel, the second channel and the second source and drain regions being entirely within the compound semiconductor layer above the second portion of the top surface and the second gate being immediately adjacent to the compound semiconductor layer.