Timing error detector with diversity loop detector decision feedback

摘要

Aspects of the disclosure pertain to an apparatus for detecting timing errors including an analog to digital converter circuit, a diversity loop detector and a timing error calculation circuit. The analog to digital converter circuit is operable to convert an input signal into a series of digital samples. The diversity loop detector is operable to apply a data detection algorithm to a plurality of signals derived from the series of digital samples at different phase offsets, to select one of the phase offsets, and to yield a detected output with the selected phase offset. The timing error calculation circuit is operable to calculate a timing error of the analog to digital converter circuit based at least in part on the selected phase offset.

主权项

1. An apparatus for detecting timing errors, comprising:
an analog to digital converter circuit operable to convert an input signal into a series of digital samples; a diversity loop detector comprising a plurality of data detectors operable to apply a data detection algorithm to a plurality of signals derived from the series of digital samples at different phase offsets, to select one of the phase offsets, and to yield a detected output with the selected phase offset, the diversity loop detector comprising a selection output operable to identify which of the plurality of data detectors in the diversity loop detector is selected, each of the plurality of data detectors comprising a soft-input hard-output detector, wherein the diversity loop detector is operable to select said one of the phase offsets that corresponds to one of the plurality of data detectors that has a lowest accumulated state metric growth; and a timing error calculation circuit operable to calculate a timing error of the analog to digital converter circuit based at least in part on the selected phase offset indicated by the selection output.