发明名称 |
Pixel array with clear and color pixels exhibiting improved blooming performance |
摘要 |
This disclosure provides pixel arrays made up of a clear pixel and a color pixel. The color pixel includes a first photo-detecting element and a color pixel access transistor to selectively couple the first photo-detecting element to a first charge-storage node. The clear pixel includes a second photo-detecting element and a clear pixel access transistor to selectively couple the second photo-detecting element to a second charge-storage node. The color pixel access transistor transfers a first charge per unit time between the first photo-detecting element and the first charge-storage node. The clear pixel access transistor transfers a second charge per unit time between the clear pixel access transistor and the second charge-storage node. The first charge per unit time is less than the second charge per unit time to mitigate blooming. In other embodiments, the clear pixel includes an excess-charge transfer path that couples the clear pixel to a DC supply node to mitigate blooming. |
申请公布号 |
US9277195(B2) |
申请公布日期 |
2016.03.01 |
申请号 |
US201414247457 |
申请日期 |
2014.04.08 |
申请人 |
Taiwan Semiconductor Manufacturing Co., Ltd. |
发明人 |
Chiu Kai-Ling;Uchiyama Masayuki;Chiu Po-Chun;Lu Tse-Hua;Yamashita Yuichiro |
分类号 |
H04N9/73;H04N9/04 |
主分类号 |
H04N9/73 |
代理机构 |
Eschweiler & Associates, LLC |
代理人 |
Eschweiler & Associates, LLC |
主权项 |
1. An integrated circuit (IC), comprising:
a color pixel including: a first photo-detecting element, and a color pixel access transistor to selectively couple the first photo-detecting element to a first charge-storage node; and a clear pixel including: a second photo-detecting element, and a clear pixel access transistor to selectively couple the second photo-detecting element to a second charge-storage node; wherein the color pixel access transistor is configured to transfer a first charge per unit time between the first photo-detecting element and the first charge-storage node, and wherein the clear pixel access transistor is configured to transfer a second charge per unit time between the clear pixel access transistor and the second charge-storage node, wherein the second charge per unit time is greater than the first charge per unit time; and wherein the color pixel access transistor and clear pixel access transistor have different width-to-length ratios or different voltage thresholds from one another. |
地址 |
Hsin-Chu TW |