Nano-electro-mechanical-switch adiabatic dynamic logic circuits

摘要

A dynamic logic gate includes a nano-electro-mechanical-switch, preferably a four-terminal-nano-electro-mechanical-switch. The invention further refers to dynamic logic cascade circuits comprising such a dynamic logic gate. In particular, embodiments of the invention concern dynamic logic cascade circuits comprising single or dual rail dynamic logic gates.

主权项

1. A method of forming dynamic logic gate, the method comprising:
configuring one or more four-terminal, nano-electro-mechanical-switches (NEMS); each NEMS having a body electrode, a source electrode, a gate electrode, and a drain electrode, the source electrode being selectively electrically connected to the drain electrode, as a function of tension between the gate electrode and the body electrode; wherein the body electrode of each NEMS is biased to a negative bias voltage (Vb) having an absolute value of min{Vpo}, where Vpo is a set of varying pull-off voltages of all NEMS in the dynamic logic gate due to process variations, wherein a given pull-off voltage Vpo comprises an absolute value of an applied gate-to-body voltage |Vgb| that results in the source electrode from being electrically disconnected from the drain electrode, and such that an applied ground voltage (0V) to the gate electrode results in pull-off of any of the NEMS; and wherein a power supply voltage (Vdd) is set to a value corresponding to the expression: max {Vpi}-min{Vpo}, where Vpi, is a set of varying pull-in voltages of all NEMS in the dynamic logic gate due to process variations, and wherein a given pull-in voltage Vpi comprises an absolute value of an applied gate-to-body voltage |Vgb| that results in the source electrode from being electrically connected to the drain electrode.