发明名称 Source line floating circuits, memory devices including the same and methods of reading data in a memory device
摘要 A source line floating circuit includes a plurality of floating units. The floating units directly receive decoded row address signals or voltages of word lines as floating control signals, respectively. The decoded row address signals are activated selectively in response to a row address signal. The floating units control electrical connections between source lines and a source voltage in response to the floating control signals in a read operation. Related devices and methods are also described.
申请公布号 US9275746(B2) 申请公布日期 2016.03.01
申请号 US201414208200 申请日期 2014.03.13
申请人 Samsung Electronics Co., Ltd. 发明人 Jeon Chang-Min;Seo Bo-Young;Yu Tea-Kwang
分类号 G11C11/00;G11C11/14;G11C11/15;G11C16/24;G11C16/26;G11C16/08;G11C11/16;G11C13/00 主分类号 G11C11/00
代理机构 Myers Bigel Sibley & Sajovec, P.A. 代理人 Myers Bigel Sibley & Sajovec, P.A.
主权项 1. A memory device comprising: a memory cell array including a plurality of memory cells arranged in a matrix form of a plurality of rows and columns, the memory cells coupled between a plurality of source lines extended in a row direction and a plurality of bit lines extended in a column direction, the memory cells configured to be selected row by row by a plurality of word lines extended in the row direction; a row selection circuit configured to generate a plurality of decoded row address signals that are activated selectively in response to a row address signal, and configured to enable one selected word line among the word lines in response to the decoded row address signals; and a source line floating circuit configured to, in a read operation, connect one selected source line of the source lines to a source voltage and configured to disconnect unselected source lines except the one selected source line from the source voltage to float the unselected source lines, the one selected source line coupled to the memory cells that are coupled to the one selected word line, wherein the source line floating circuit includes a plurality of floating units that receive the decoded row address signals or voltages of the word lines as floating control signals, respectively, the floating units configured to control electrical connections between the source lines and the source voltage in response to the floating control signals.
地址 KR