发明名称 IMAGE PROCESSOR, IMAGE PROCESSING SYSTEM INCLUDING IMAGE PROCESSOR, SYSTEM-ON-CHIP INCLUDING IMAGE PROCESSING SYSTEM, AND METHOD OF OPERATING IMAGE PROCESSING SYSTEM
摘要 An image processor is provided. In some examples, the image processor is in a system on chip or part of a larger image processing system. The image processor may include an application processor, a codec module, and a memory controller, and in some examples may also function with a dithering unit, a display controller, a display, and/or a CMOS image sensor. The image processor processes, stores, and reads image data using an embedded memory and/or an external memory. The image data is comprised of a plurality of pixels, each of which may include a first and second set of bits that can be separately or simultaneously accessed at the memory in a first and second region of the memory using one or more addresses. The first set of bits may correspond to the more significant bits of each pixel and the second set of bits may correspond to the less significant bits. In some examples the number of bits in each of the first and second set of bits may be selected according to the width of a used data bus and/or features of a peripheral device connected to the image processor such as a display.
申请公布号 US2016057437(A1) 申请公布日期 2016.02.25
申请号 US201514820566 申请日期 2015.08.07
申请人 Jeong Kyung-ah;Shin Sun-young;Oh Jin-hong 发明人 Jeong Kyung-ah;Shin Sun-young;Oh Jin-hong
分类号 H04N19/426;G09G5/00;H04N19/86;H04N19/44;H04N5/917 主分类号 H04N19/426
代理机构 代理人
主权项 1. An image processing system on a chip (SoC), comprising: an application processor, including a codec module, anda memory controller, wherein the codec module is configured to receive and decode an encoded image, the decoded image being represented as a plurality of pixels, each pixel having a pixel value comprised of a plurality of bits including first bits and second bits, wherein, the memory controller is configured to access from a memory only the first bits of pixel data of the plurality of pixels in a first operation, and is configured to access from the memory the first bits and the second bits of the plurality of pixels in a second operation.
地址 Seoul KR