发明名称 SYSTEM AND METHOD FOR REVERSE INCLUSION IN MULTILEVEL CACHE HIERARCHY
摘要 A processing system having multilevel cache employs techniques for identifying and selecting valid candidate cache lines for eviction from a lower level cache of an inclusive cache hierarchy, so as to reduce invalidations resulting from an eviction of a cache line in a lower level cache that also resides in a higher level cache. In response to an eviction trigger for a lower level cache, a cache controller identifies candidate cache lines for eviction from the cache lines residing in the lower level cache based on the replacement policy. The cache controller uses residency metadata to identify the candidate cache line as a valid candidate if it does not also reside in the higher cache and as an invalid candidate if it does reside in the higher cache. The cache controller prevents eviction of invalid candidates, so as to avoid unnecessary invalidations in the higher cache while maintaining inclusiveness.
申请公布号 US2016055100(A1) 申请公布日期 2016.02.25
申请号 US201414463647 申请日期 2014.08.19
申请人 Advanced Micro Devices, Inc. 发明人 Loh Gabriel H.
分类号 G06F12/12;G06F12/08 主分类号 G06F12/12
代理机构 代理人
主权项 1. A system comprising: an inclusive cache hierarchy comprising a first cache and a second cache, wherein the inclusive cache hierarchy employs an inclusive scheme requiring that each cache line residing in the first cache also reside in the second cache; and replacement policy logic to: in response to an eviction trigger for the second cache: identify a set of one or more candidate cache lines of the second cache for eviction;for each cache line of the set, identify the candidate cache line as an invalid candidate cache line responsive to the candidate cache line residing in the first cache; andprevent eviction of any invalid candidate cache lines of the set.
地址 Sunnyvale CA US