发明名称 DISPLAY DEVICE HAVING SHARED COLUMN LINES
摘要 A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits.
申请公布号 US2016055810(A1) 申请公布日期 2016.02.25
申请号 US201514932620 申请日期 2015.11.04
申请人 Sony Corporation 发明人 Asano Mitsuru
分类号 G09G3/36;H01L27/32;G09G5/18;G09G3/30;G09G3/32 主分类号 G09G3/36
代理机构 代理人
主权项 1. A display device comprising: a plurality of pixel circuits arranged in a matrix; signal lines for supplying data signals;precharge potential lines arranged in a column direction; power supply potential lines arranged in the column direction, wherein one of the power supply potential lines is shared by pixel circuits in a first column of the plurality of pixel circuits and a second column of the plurality of pixel circuits, wherein one of the precharge potential lines is shared by pixel circuits in the second column and a third column of the plurality of pixel circuits, wherein the second column is adjacent to the first column, the second column is adjacent to the third column, and the second column is between the first column and the third column, wherein the one of the power supply potential lines is located between the first column and the second column, but none of the precharge potential lines are located between the first column and the second column, wherein the one of the precharge potential lines is located between the second column and the third column, but none of the power supply potential lines are located between the second column and the third column, and wherein transistors of a first pixel circuit in the first column and transistors of a second pixel circuit in the second column are arranged in a symmetrical manner with respect to an axis along the column direction.
地址 Tokyo JP