发明名称 SIGNAL OUTPUT CIRCUIT
摘要 An object is to output output signal amplitude exceeding power supply voltage or output signal amplitude falling below ground voltage without requiring a charge pump circuit or the like to generate positive or negative power supply voltage for an operational amplifier. The present invention provides a signal output circuit comprising an operational amplifier including: an amplification stage configured to amplify differential input voltage; and an output stage configured to amplify an input signal amplified by the amplification stage and output the input signal as an output signal, wherein the output stage is a switched capacitor circuit which includes switches and a capacitor configured to sample differential voltage between input voltage outputted from the amplification stage and voltage other than the input voltage and which transfers the differential voltage sampled in the capacitor by switching of the switches based on the input voltage.
申请公布号 US2016056775(A1) 申请公布日期 2016.02.25
申请号 US201414779642 申请日期 2014.03.27
申请人 ASAHI KASEI MICRODEVICES CORPORATION 发明人 MATSUOKA Daisuke
分类号 H03F3/00;H03F3/45;H02M3/07 主分类号 H03F3/00
代理机构 代理人
主权项 1. A signal output circuit, including an operational amplifier including an amplification stage configured to amplify differential input voltage and an output stage configured to amplify an input signal amplified by the amplification stage and output the input signal as an output signal, wherein the output stage is a switched capacitor circuit comprising: switches; anda capacitor configured to sample differential voltage between input voltage outputted from the amplification stage and given voltage other than the input voltage, and wherein the switched capacitor circuit transfers the differential voltage sampled in the capacitor by switching of the switches based on the input voltage.
地址 Tokyo JP