Low-Inductance Circuit Arrangement Comprising Load Current Collecting Conductor Track

摘要

A circuit arrangement includes at least two semiconductor chip having first and second load terminals that are each connected to one another, a first load current collecting conductor track, and also an external terminal electrically conductively connected thereto. For each of the semiconductor chips there is at least one electrical connection conductor electrically conductively connected to the first load terminal of the relevant semiconductor chip and also to the first load current collecting conductor track. The total inductance of all the connection conductors with which the first load terminal of the second of the semiconductor chips is connected to the first load current collecting conductor track has at least twice the inductance of that section of the first load current collecting conductor track which is formed between the second connection location of the first of the semiconductor chips and the second connection location of the second of the semiconductor chips.

主权项

1. A circuit arrangement comprising:
a number of at least two semiconductor chips arranged one behind another in a series extending in a first lateral direction, wherein
each of the semiconductor chips has a semiconductor body, and also a first load terminal and a second load terminal;the first load terminals of all the semiconductor chips are electrically conductively connected to one another; andthe second load terminals of all the semiconductor chips are electrically conductively connected to one another; a first load current collecting conductor track; for each of the semiconductor chips at least one electrical connection conductor having a first connection location, at which the relevant connection conductor is electrically conductively connected to the first load terminal, and also having a second connection location, at which the relevant connection conductor is electrically conductively connected to the first load current collecting conductor track; and an external terminal of the circuit arrangement, said external terminal being electrically conductively connected to the first load current collecting conductor track; whereinit holds true that for each first and second of the semiconductor chips whose second connection locations form directly adjacent second connection locations among all the latter along the first load current collecting conductor track and are arranged with respect to one another such that the second connection location of the first of the semiconductor chips is situated along the first load current collecting conductor track between the second connection location of the second of the semiconductor chips and the external terminal, a total inductance of all the connection conductors with which the first load terminal of the second of the semiconductor chips is connected to the first load current collecting conductor track is at least twice an inductance of that section of the first load current collecting conductor track which is formed between the second connection location of the first of the semiconductor chips and the second connection location of the second of the semiconductor chips.