FAST RECOVERY SCHEME OF TRANSCONDUCTANCE GAIN FOR FOLDED CASCODE AMPLIFIER

摘要

A folded cascode amplifier (FCA) including cascode stages coupled in a stacked cascode configuration, an input stage, and a switch circuit. The stages may include first and second P-type stages and first and second N-type stages, in which the first N-type stage and the input stage receive first and second bias voltages, respectively. The switch circuit couples a first cascode bias voltage to the second P-type stage and couples a second cascode bias voltage to the first N-type stage in a high power state, and decouples the first and second cascode bias voltages in a low power state. A non-switched low current bias generator provides the first and second bias and cascode bias voltages, which remain substantially stable in the low and high power states. Only low parasitic capacitance nodes are switched between power states so that the gain of the FCA recovers very quickly for the high power state.

主权项

1. An electronic device, comprising:
a folded cascode amplifier, comprising:
first and second P-type stages and first and second N-type stages, wherein said second N-type stage receives a first bias voltage;an input stage receiving a second bias voltage;wherein said first P-type stage is coupled between an upper supply voltage and said second P-type stage, wherein said second P-type stage is coupled between said first P-type stage and said first N-type stage, wherein said first N-type stage is coupled between said second P-type stage and said second N-type stage, wherein said second N-type stage is coupled between said first N-type stage and a lower supply voltage, and wherein said input stage is coupled between said upper supply voltage and said second N-type stage; anda switch circuit that couples a first cascode bias voltage to said second P-type stage and couples a second cascode bias voltage to said first N-type stage in a high power state, and that decouples said first cascode bias voltage from said second P-type stage and decouples said second cascode bias voltage from said first N-type stage in a low power state;wherein said first and second bias voltages and said first and second cascode bias voltages remain substantially stable in said low and high power states.