发明名称 MEMORY SYSTEM AND ERROR CORRECTION DECODING METHOD
摘要 According to one embodiment, there is provided a memory system including a first generating unit, a buffer unit, a decoding unit, and an update unit. The first generating unit generates logarithm likelihood ratios for plural pieces of data read from a plurality of memory cells. The buffer unit stores the logarithm likelihood ratios. The decoding unit performs first error correction decoding process on the logarithm likelihood ratios, and estimates a logarithm likelihood ratio of data corresponding to an error memory cell among the plural pieces of read data. The update unit updates the logarithm likelihood ratios stored in the buffer unit using the estimated logarithm likelihood ratio.
申请公布号 US2016055055(A1) 申请公布日期 2016.02.25
申请号 US201514626072 申请日期 2015.02.19
申请人 Kabushiki Kaisha Toshiba 发明人 HARADA Kohsuke;KOKUBUN Naoaki
分类号 G06F11/10;H03M13/39;G11C29/52 主分类号 G06F11/10
代理机构 代理人
主权项 1. A memory system, comprising: a first generating unit that generates logarithm likelihood ratios for plural pieces of data read from a plurality of memory cells; a buffer unit that stores the logarithm likelihood ratios; a decoding unit that performs first error correction decoding process on the logarithm likelihood ratios, and estimates a logarithm likelihood ratio of data corresponding to an error memory cell among the plural pieces of read data; and an update unit that updates the logarithm likelihood ratios stored in the buffer unit using the estimated logarithm likelihood ratio.
地址 Minato-ku JP