发明名称 Solid-state imaging device and electronic apparatus
摘要 A solid-state imaging device includes a pixel region in which shared pixels which share pixel transistors in a plurality of photoelectric conversion portions are two-dimensionally arranged. The shared pixel transistors are divisionally arranged in a column direction of the shared pixels, the pixel transistors shared between neighboring shared pixels are arranged so as to be horizontally reversed or/and vertically crossed, and connection wirings connected to a floating diffusion portion, a source of a reset transistor and a gate of an amplification transistor in the shared pixels are arranged along the column direction.
申请公布号 US9270915(B2) 申请公布日期 2016.02.23
申请号 US201514796599 申请日期 2015.07.10
申请人 Sony Corporation 发明人 Kido Hideo;Yamamoto Atsuhiko;Yamada Akihiro
分类号 H04N5/3745;H04N5/378;H01L27/146;H04N5/376;H04N5/374 主分类号 H04N5/3745
代理机构 Michael Best & Friedrich LLP 代理人 Michael Best & Friedrich LLP
主权项 1. An imaging device comprising: a first shared pixel including: a first plurality of photoelectric conversion portions, and a first transistor portion shared by the first plurality of photoelectric conversion portions, the first transistor portion including a first reset transistor, a first amplification transistor, and a first selection transistor; and a second shared pixel disposed adjacent to the first shared pixel and including: a second plurality of photoelectric conversion portions, and a second transistor portion shared by the second plurality of photoelectric conversion portions, the second transistor portion including a second reset transistor, a second amplification transistor, and a second selection transistor, wherein a gate terminal of the first selection transistor, a gate terminal of the first amplification transistor, a gate terminal of the second amplification transistor, and a gate terminal of the second selection transistor are adjacent one another in a first row in this order, and wherein a gate terminal of the first reset transistor and a gate terminal of the second reset transistor are disposed in a second row.
地址 Tokyo JP