Photolithography mask synthesis for spacer patterning

摘要

Photolithography mask synthesis is disclosed for spacer patterning masks. In one example, backbone features are extracted from a target layout of a mask design. A connectivity graph is generated based on the target layout in which lines of the backbone features are represented as nodes on the connectivity graph. The nodes are connected based on spacer patterning process limitations and the connections are assigned to sets. A backbone mask layout is then generated based on one of the sets of nodes.

主权项

1. A method comprising:
identifying areas of a target layout of a mask design that will be generated using an add mask, the target layout being for a spacer photolithography patterning process for patterning a semiconductor device; extracting add features from the target layout using the identified areas; extracting backbone features from the target layout after extracting the add features, the backbone features corresponding to photoresist in a grid of parallel lines between deposited spacers and excluding the identified add features; generating a connectivity graph based on the target layout, the connectivity graph capturing local constraints from the spacer photolithography patterning process; representing lines of the backbone features as nodes on the connectivity graph, the nodes corresponding to edges that are formed by spacer growth in the spacer photolithography patterning process; connecting nodes of the connectivity graph based on spacer patterning process limitations; assigning connections to sets so that nodes that are not compatible are assigned to different sets; generating a backbone mask layout based on one of the sets of nodes; and synthesizing a photolithography mask for patterning a layer of photoresist on the semiconductor device using the generated backbone mask layout.