| 发明名称 | Pattern between pattern for low profile substrate | ||
| 摘要 | An integrated circuit (IC) substrate that includes a second patterned metal layer formed in between a first patterned metal layer is disclosed. A dielectric layer formed on the first patterned metal layer separates the two metal layers. A non-conductive layer is formed on the dielectric layer and the second patterned metal layer. | ||
| 申请公布号 | US9269610(B2) | 申请公布日期 | 2016.02.23 |
| 申请号 | US201414253798 | 申请日期 | 2014.04.15 |
| 申请人 | QUALCOMM Incorporated | 发明人 | We Hong Bok;Kim Chin-Kwan;Kim Dong Wook;Lee Jae Sik;Hwang Kyu-Pyung;Song Young Kyu |
| 分类号 | H01L21/44;H01L21/768;H01L23/498;H01L21/48;H01L23/528;H01L23/532 | 主分类号 | H01L21/44 |
| 代理机构 | Muncy, Geissler, Olds & Lowe, P.C. | 代理人 | Muncy, Geissler, Olds & Lowe, P.C. |
| 主权项 | 1. A substrate, comprising: a first patterned metal layer on a substrate; a dielectric layer on the first patterned metal layer; a second patterned metal layer on the dielectric layer, wherein one or more portions of the second patterned metal layer are located on the dielectric layer in between one or more portions of the first patterned metal layer; and a non-conductive layer on the dielectric layer and the second patterned metal layer. | ||
| 地址 | San Diego CA US | ||