Controller to detect malfunctioning address of memory device

摘要

A controller includes a memory test logic circuit to detect a malfunctioning row of primary data storage elements within an external memory device, an internal memory to store an address corresponding to the malfunctioning row of the external memory device, and a memory setup logic circuit to initiate a repair mode in the external memory device and to end the repair mode in the external memory device. The controller further includes a port to couple to an address line to transmit the address corresponding to the malfunctioning row of the external memory device.

主权项

1. A controller comprising:
an internal memory to store an address; and a memory control unit operatively coupled with the internal memory, the memory control unit comprising a memory test logic circuit to detect a malfunctioning row of primary data storage elements within an external memory device, the external memory device being another semiconductor device separate from the controller, the memory test logic circuit to store the address in the internal memory, the address indicating the malfunctioning row of primary data storage elements, wherein the memory control unit further comprises a memory setup logic circuit.