Semiconductor device enabling refreshing of redundant memory cell instead of defective memory cell

摘要

A semiconductor device includes memory blocks MB1 and MB2 and redundancy determination circuit 25 that can enter a normal operation mode that accesses either memory block MB1 or memory block MB2 and a refresh mode that simultaneously accesses both memory block MB1 and memory block MB2. In response to normal memory cell NMC that belongs to at least one of memory blocks MB1 and MB2 being replaced by redundant memory cell RMC in the refresh mode, redundancy determination circuit 25 deactivates normal cell area NCA to which normal memory cell NMC that is a source of replacement belongs, and activates redundant cell area RCA to which redundant memory cell RMC that is to be replaced belongs and normal cell area NCA to which normal memory cell NMC that is not being replaced belongs.

主权项

1. A method for accessing a dynamic random access memory having two memory blocks each comprising a normal cell area and a redundant cell area, comprising:
receiving a normal operation command including a first row address; activating, if the first row address corresponds to a redundant address, a first redundant wordline in the redundant cell area of a first block among the two memory blocks determined by a first bit in the first row address while not activating the normal cell area of the first block, not activating the redundant cell area of a second block among the two memory blocks, and not activating the normal cell area of the second block; activating, if the first row address does not correspond to the redundant address, a first normal wordline corresponding to a portion of the first row address in the normal cell area of the first block while not activating the redundant cell area of the first block, not activating the redundant cell area of the second block, and not activating the normal cell area of the second block; receiving a refresh operation command including a second row address; activating, if the second row address corresponds to the redundant address, the first redundant wordline and a second normal wordline corresponding to a portion of the second row address in the normal cell area of the second block while not activating the normal cell area of the first block and not activating the redundant cell area of the second block; and activating, if the second row address does not correspond to the redundant address, the second normal wordline and a third normal wordline corresponding to the portion of the second row address in the normal cell area of the first block while not activating the redundant cell area of the first block, and not activating the redundant cell area of the second block.