发明名称 Generating read thresholds using gradient descent and without side information
摘要 A first bit position of a cell in solid state storage is read where a sorting bit is obtained using the read of the first bit position. A second bit position of the cell is read for a first time, including by setting a first read threshold associated with the second bit position to a first value and setting a second read threshold associated with the second bit position to a second value. The second bit position of the cell is read for a second time, including by setting the first read threshold to a third value and setting the second read threshold to a fourth value. A new value for the first read threshold and for the second read threshold is generated using the sorting bit, the first read, and the second read.
申请公布号 US9269449(B2) 申请公布日期 2016.02.23
申请号 US201414550764 申请日期 2014.11.21
申请人 SK Hynix memory solutions inc. 发明人 Lee Frederick K. H.;Bellorado Jason;Subramanian Arunkumar;Zeng Lingqi;Tang Xiangyu;Aslam Ameen
分类号 G11C11/34;G11C16/26;G11C16/10;G11C11/56;G11C16/04;G11C16/34;G11C16/06 主分类号 G11C11/34
代理机构 IP & T Group LLP 代理人 IP & T Group LLP
主权项 1. A system, comprising: a solid state storage interface configured to: read a first bit position of a cell in solid state storage, wherein a sorting bit is obtained using the read of the first bit position;read a second bit position of the cell for a first time, including by: setting a first read threshold associated with the second bit position to a first read threshold value; andsetting a second read threshold associated with the second bit position to a second read threshold value; andread the second bit position of the cell for a second time, including by: setting the first read threshold to a third read threshold value; andsetting the second read threshold to a fourth read threshold value; and a read threshold generator configured to generate a new value for the first read threshold and a new value for the second read threshold using: (1) the sorting bit, (2) the first read of the second bit position, and (3) the second read of the second bit position.
地址 San Jose CA US