Pixel circuit for organic light emitting display and driving method thereof, organic light emitting display

摘要

A pixel circuit for an organic light emitting display includes first, second, third, fourth, fifth, and sixth MOS transistors, a first capacitor, and an organic light emitting diode. During a initialization stage, the sixth MOS transistor is turned on, and a reference voltage is transmitted to the gate electrode of the second MOS transistor. During a data-writing stage, the first MOS transistor is turned on and a data signal is transmitted to the first terminal of the first capacitor, the fourth MOS transistor is turned on and the other MOS transistors are turned off. During a light emitting stage, the fifth MOS transistor is turned on and the voltage at the gate of the second MOS transistor is based on the data signal. As a result, the third MOS transistor generates a drive current based on the data signal.

主权项

1. An organic light emitting display comprising:
a scanning drive unit; a data drive unit; N scan lines; M data lines; and a plurality of pixel circuits, each of the pixel circuits comprising:
an organic light emitting diode;a first MOS transistor, comprising a gate electrode, a first electrode, and a second electrode;a second MOS transistor, comprising a gate electrode, a first electrode, and a second electrode, wherein the first electrode of the second MOS transistor is coupled to a first power supply;a third MOS transistor, comprising a gate electrode, a first electrode, and a second electrode, wherein the first electrode of the third MOS transistor is coupled to the second electrode of the second MOS transistor, and the second electrode of the third MOS transistor is coupled to a second power supply via the organic light emitting diode;a fourth MOS transistor, comprising a gate electrode, a first electrode, and a second electrode, wherein the first electrode of the fourth MOS transistor is coupled to the gate electrode of the second MOS transistor, and the second electrode of the fourth MOS transistor is coupled to the second electrode of the second MOS transistor;a fifth MOS transistor, comprising a gate electrode, a first electrode, and a second electrode;a sixth MOS transistor, comprising a gate electrode, a first electrode, and a second electrode, wherein the second electrode of the sixth MOS transistor is coupled to the gate electrode of the second MOS transistor; anda first capacitor, comprising first and second terminals, wherein the first terminal of the first capacitor is coupled to the second electrode of the first MOS transistor and is coupled to the second electrode of the fifth MOS transistor, and the second terminal is coupled to the gate electrode of the second MOS transistor and is coupled to the first electrode of the fourth MOS transistor,wherein the gate electrode of the first MOS transistor receives a first scanning signal, the first electrode of the first MOS transistor receives a data signal, the gate electrode of the third MOS transistor receives a control signal, the gate electrode of the fourth MOS transistor receives the first scanning signal, the gate electrode of the fifth MOS transistor receives the control signal, the first electrode of the fifth MOS transistor receives a reference voltage, the gate electrode of the sixth MOS transistor receives a second scanning signal, and the first electrode of the sixth MOS transistor receives the reference voltage, wherein the scanning drive unit is configured to provide scanning signals to respective scan lines, the data drive unit is configured to provide data signals to respective data lines, and the plurality of the pixel circuits are respectively arranged in pixel areas formed near intersections of the scan lines and the data lines, and wherein the gate electrodes of the first MOS transistor and the fourth MOS transistor are both coupled to an nth scan line, and the gate electrode of the sixth MOS transistor is coupled to an (n+1)th scan line, where 1≦n