CONTENT ADDRESSABLE MEMORY CELL AND ARRAY

摘要

A content addressable memory (CAM) cell system is provided. The CAM cell system includes a first memory cell, a first logic circuitry and a first compare circuitry. The first logic circuit includes a first n-FET, a first p-FET, and a first input terminal. A gate of the first n-FET and a gate of the first p-FET are galvanically coupled to the first input terminal. The first compare circuitry is communicatively coupled to the first memory cell via a first coupling, and to the first input terminal via a second coupling. The first compare circuitry is configured to receive first data stored in the first memory cell via the first coupling, receive first match data, transmit a first binary logical value to the first input terminal via the second coupling in response to the first data not matching the first match data, and transmit a second binary logical value to the first input terminal via the second coupling in response to the first data matching the first match data.

主权项

1. A content addressable memory (CAM) cell comprising:
a first memory cell; a first logic circuitry comprising a first n-type field effect transistor (n-FET), a first p-type field effect transistor (p-FET), and a first input terminal, wherein a gate of the first n-FET and a gate of the first p-FET are galvanically coupled to the first input terminal; and a first compare circuitry communicatively coupled to the first memory cell via a first coupling, and to the first input terminal via a second coupling, wherein the first compare circuitry is configured to:
receive first data stored in the first memory cell via the first coupling;receive first match data;transmit a first binary logical value to the first input terminal via the second coupling in response to the first data not matching the first match data; andtransmit a second binary logical value to the first input terminal via the second coupling in response to the first data matching the first match data.