MEMORY DEVICE COMPRISING ELECTRICALLY FLOATING BODY TRANSISTOR

摘要

A semiconductor memory instance is provided that includes an array of memory cells. The array includes a plurality of semiconductor memory cells arranged in at least one column and at least one row. Each of the semiconductor memory cells includes a floating body region configured to be charged to a level indicative of a state of the memory cell. Further includes are a plurality of buried well regions, wherein each of the buried well regions can be individually selected, and a decoder circuit to select at least one of the buried well regions.

主权项

1. A semiconductor memory instance comprising:
an array of memory cells, the array comprising: a plurality of semiconductor memory cells arranged in at least one column and at least one row, each said semiconductor memory cell comprising: a floating body region configured to be charged to a level indicative of a state of the memory cell; a plurality of buried well regions, wherein each of said buried well regions can be individually selected; and a decoder circuit to select at least one of said buried well regions.