Using a Barycenter Compact Model for a Circuit Network

摘要

Any primitive cells or blocks can be represented physically by a Barycenter compact model (or Barycenter model), and any black box model can also be physically represented by a Barycenter compact model physically. A hierarchical boundary condition between blocks is formulated by the Barycenter compact model. Hierarchical boundary condition problems between blocks can be limited within two levels only if using the Barycenter compact model.

主权项

1. A method comprising:
providing a hierarchical system graph of an electronic circuit comprising multiple instances of at least one primitive; identifying each branch of the system graph as at least one of a tree branch or a link, wherein the tree branches form a tree of the system graph without flattening a hierarchy of the system graph; dividing the tree into n subtree instances comprising at least first and second subtree instances, wherein n is predefined number of instances having an integer value 2 or greater; identifying links of the system graph as at least one of a global link or a local link, wherein the system graph comprises both global and local links, a global link forms a path from a branch of the first subtree instance to a branch of the second subtree instance, and a loop with the global link and branches of the first and second subtrees has a voltage drop of 0; using at least one computer processor, recursively partitioning the first subtree instance into i subtrees while a number of branches of each of the i subtrees is greater than a predefined partition size; modeling each of the i subtrees using a first block model or a second block model, wherein the first block model comprises: a plurality of boundary nodes; a plurality of boundary branches, one boundary branch coupled to each boundary node; and an internal point node coupled to each of the boundary nodes through, at most, a single boundary branch