发明名称 |
MEMORY ACCESS CONTROL DEVICE, AND MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To provide a manufacturing method using a memory chip without receiving the influence of connection failure between a logic chip and the memory chip.SOLUTION: A memory access control device includes: a bit position information storage part for storing bit position information indicating one or more bit positions in a predetermined length of bit string; a reading part that tries to read out, from a memory, a bit string with the larger number of bits than the number of bits in a range of a storage area designated by a logic address, in a predetermined length unit; and a bit string extraction part that extracts a bit at a bit position indicated in the bit position information stored in the bit position information storage part, from the bit string taken out from the memory through the trial of read-out performed by the reading part, in a predetermined length unit. Integrated circuits are classified into ones for high performance and ones for popular performance depending on a usable bandwidth (S3320).SELECTED DRAWING: Figure 33 |
申请公布号 |
JP2016027472(A) |
申请公布日期 |
2016.02.18 |
申请号 |
JP20150146438 |
申请日期 |
2015.07.24 |
申请人 |
PANASONIC IP MANAGEMENT CORP |
发明人 |
MORIMOTO TAKASHI;HASHIMOTO TAKASHI |
分类号 |
G06F12/16;G01R31/26;G11C5/00;G11C29/00;H01L21/60;H01L25/065;H01L25/07;H01L25/18 |
主分类号 |
G06F12/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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