| 摘要 |
A multiprocessor device is provided with external memory, a plurality of processors, a memory aggregation device, register memory, a multiplexer, and a general control device. The memory aggregation device aggregates the memory accesses of the plurality of processors. The register memory is prepared by a number equal to the product of the number of registers managed by the processor and the maximum number of processes of the processor. The multiplexer accesses the register memory in accordance with an instruction given for the register access of the processor. The general control device extracts a parameter from the instruction, gives the extracted parameter to the processor and multiplexer, and controls the processor and multiplexer, as well as has a given number of processes successively processed using the same instruction while having the addressing of the register memory changed by the processor and, when processing is finished for the number of processes, has the instruction switched to the next one and processing repeated for the given number of processes. |
