发明名称 配線基板
摘要 This wiring board is provided with: a plurality of metal wires disposed upon an insulating substrate (32A); and a transparent adhesive agent layer (34A) which is disposed upon the metal wires, and which is in direct contact with the metal wires. The metal wires include: a first metal wire (50a) which has a first pulse signal (P1) supplied thereto; and a second metal wire (54a) which has, supplied thereto during a time period in which the first pulse signal (P1) is being supplied to the fist metal wire (50a), a second pulse signal (P2) in synchronization with the first pulse signal (P1), and which has a fixed electric potential applied thereto in a time period excluding the aforementioned time period.
申请公布号 JP5864469(B2) 申请公布日期 2016.02.17
申请号 JP20130071869 申请日期 2013.03.29
申请人 富士フイルム株式会社 发明人 遠藤 靖;多田 信之;西田 徹二;池田 秀夫;柴田 路宏
分类号 H05K1/02;C09J133/14;C09J133/26;G06F3/041;H05K3/28 主分类号 H05K1/02
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