发明名称 配線基板
摘要 This wiring board is provided with: a plurality of metal wires disposed upon an insulating substrate; and a transparent adhesive agent layer which is disposed upon the metal wires, and which is in direct contact with the metal wires. The metal wires include: a first metal wire which has a pulse signal supplied thereto; and a second metal wire which has a fixed electric potential applied thereto. The pulse signal has a reference level identical to the fixed electric potential, and has a pulse train in which a plurality of pulses having a pulse width of not more than 3 msec are arranged, the integral time of the pulses in a period of 600 seconds being less than 60 seconds.
申请公布号 JP5864470(B2) 申请公布日期 2016.02.17
申请号 JP20130072959 申请日期 2013.03.29
申请人 富士フイルム株式会社 发明人 遠藤 靖;多田 信之;直井 憲次;浅井 智仁;池田 秀夫;柴田 路宏
分类号 H05K1/02;C09J133/14;C09J133/26;G06F3/041;H05K3/28 主分类号 H05K1/02
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