发明名称 半導体集積回路
摘要 A semiconductor integrated circuit includes a plurality of output transistors each controlling the magnitude of an output voltage relative to the magnitude of a load current according to a control value indicated by an impedance control signal applied to a control terminal, a voltage monitor circuit outputting an output voltage monitor value indicating a voltage value of the output voltage, and a control circuit controlling the magnitude of the control value according to the magnitude of an error value between a reference voltage indicating a target value of the output voltage and the output voltage monitor value, and controls based on the control value whether any of such transistors be brought to a conducting state. The control circuit increases a change step of the control value relative to the error value during a predetermined period according to prenotification signals for notifying a change of the load current in advance.
申请公布号 JP5864220(B2) 申请公布日期 2016.02.17
申请号 JP20110247215 申请日期 2011.11.11
申请人 ルネサスエレクトロニクス株式会社 发明人 小野内 雅文;大津賀 一雄;五十嵐 康人;森田 貞幸;石橋 孝一郎;柳沢 一正
分类号 G05F1/56;H03K17/687 主分类号 G05F1/56
代理机构 代理人
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