发明名称 Performance monitoring in a data processing apparatus capable of executing instructions at a plurality of privilege levels
摘要 A data processing apparatus (Figure 1) has processing circuitry which can execute instructions at one of several privilege levels, and includes a plurality of performance monitoring circuits. In response to an instruction executed at a first privilege level EL1, first configuration data is set 102 for controlling performance monitoring by a first subset of performance monitoring circuits (50 in Figure 4). A disable control flag 100 can be set in response to an instruction executed at a second privilege level EL2 higher than the first privilege level. If the disable control flag has a predetermined value then performance monitoring control circuitry disables performance monitoring by the first subset of performance monitoring circuits while the processing circuitry is executing instructions at the second privilege level; see 106, 108. The performance monitoring circuits may include event counters (30, 32 in Figure 4). The first privilege level may correspond to a guest operating system and the second privilege level may correspond to a hypervisor mode. The invention may be employed during tasks where security is critical, such as when checking a password.
申请公布号 GB2529248(A) 申请公布日期 2016.02.17
申请号 GB20140014546 申请日期 2014.08.15
申请人 ARM LIMITED 发明人 MICHAEL JOHN WILLIAMS;SIMON JOHN CRASKE
分类号 G06F11/34;G06F9/455 主分类号 G06F11/34
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