| 摘要 |
Full wave voltage multipliers mostly provide only even multiples (2×, 4×, 8× . . . ). This invention details a process to produce a full wave multiplier that will provide voltage with an odd numbered multiplicand (3×, 5×, 7×, etc.) from the next-higher-numbered, and thus even-numbered, full wave multiplier (so a 3× will be devised from the 4×, a 5× from the 6×, and for any odd (n)×, from the even (n+1)×). Each of a simplified, base 3× and 5× full wave voltage multiplier are also disclosed. |
| 主权项 |
1. A method for producing an odd numbered full wave voltage multiplier, comprising:
starting with a standard design for an even numbered full wave voltage multiplier with a multiple value one higher than the desired odd number multiple; altering that standard design by redesigning the two lines from the AC power source using the following steps in any order:
(a) taking the first line and disconnecting that part of the first line which ran from the AC power source to the closest capacitor towards the opposite side, and instead connecting that part of the first line from the AC power source to the cathode junction of the closest diode on that opposite side; and,(b) taking the second line and disconnecting that part of the second line which ran from the AC power source to the cathode junction of the leftmost diode on the same side, and instead connecting that part of the second line from the AC power source to the leftmost capacitor on the same side;(c) removing the last capacitor and its associated wiring on each line; making no other changes; and, using the resultant design to produce an odd numbered full wave voltage multiplier. |
