发明名称 |
Nanowire field effect transistor with inner and outer gates |
摘要 |
A semiconductor device comprising a suspended semiconductor nanowire inner gate and outer gate. A first epitaxial dielectric layer surrounds a nanowire inner gate. The first epitaxial dielectric layer is surrounded by an epitaxial semiconductor channel. The epitaxial semiconductor channel surrounds a second dielectric layer. A gate conductor surrounds the second dielectric layer. The gate conductor is patterned into a gate line and defines a channel region overlapping the gate line. The semiconductor device contains source and drain regions adjacent to the gate line. |
申请公布号 |
US9263260(B1) |
申请公布日期 |
2016.02.16 |
申请号 |
US201414571348 |
申请日期 |
2014.12.16 |
申请人 |
International Business Machines Corporation |
发明人 |
Basu Anirban;Cohen Guy M.;Majumdar Amlan;Sleight Jeffrey W. |
分类号 |
H01L21/20;H01L21/335;H01L21/00;H01L29/772;H01L29/775;H01L21/02;H01L51/00 |
主分类号 |
H01L21/20 |
代理机构 |
|
代理人 |
Patel Jinesh;Percello Louis J. |
主权项 |
1. A semiconductor device comprising:
a suspended semiconductor nanowire inner gate; a first epitaxial dielectric layer surrounding the suspended semiconductor nanowire inner gate; an epitaxial semiconductor channel surrounding the first epitaxial dielectric layer; a second dielectric layer surrounding the epitaxial semiconductor channel; a gate conductor surrounding the second dielectric layer, wherein the gate conductor is patterned into a gate line to define a channel region overlapping the gate line; and a source-drain region adjacent to the gate line. |
地址 |
Armonk NY US |