发明名称 |
Microcomputer and method for controlling memory access |
摘要 |
A microcomputer including a CPU, a plurality of protection information storages configured to store memory protection information specifying an access permission state or access prohibited state to a memory space by a program executed by the CPU, a memory access control apparatus configured to determine whether or not to allow a memory access request from the CPU according to the memory protection information, and a reset apparatus configured to output a reset signal to the plurality of protection information storages according to a reset request output from the CPU according to a switching of programs executed by the CPU. Each of the plurality of protection information storages is set to a second memory protection state according to the reset signal from a first memory protection state. |
申请公布号 |
US9262341(B2) |
申请公布日期 |
2016.02.16 |
申请号 |
US201514678454 |
申请日期 |
2015.04.03 |
申请人 |
Renesas Electronics Corporation |
发明人 |
Ono Rika;Suzuki Hitoshi |
分类号 |
G06F12/14 |
主分类号 |
G06F12/14 |
代理机构 |
McGinn IP Law Group, PLLC |
代理人 |
McGinn IP Law Group, PLLC |
主权项 |
1. A microcomputer comprising:
a CPU (central processing unit); a plurality of protection information storages configured to store memory protection information specifying an access permission state or access prohibited state to a memory space by a program executed by the CPU; a memory access control apparatus configured to determine whether or not to allow a memory access request from the CPU according to the memory protection information; and a reset apparatus configured to output a reset signal to the plurality of protection information storages according to a reset request output from the CPU according to a switching of programs executed by the CPU, wherein each of the plurality of protection information storages is set to a second memory protection state according to the reset signal from a first memory protection state. |
地址 |
Kawasaki-shi, Kanagawa JP |