| 发明名称 | Component, for example NMOS transistor, with active region with relaxed compression stresses, and fabrication method | ||
| 摘要 | An integrated circuit includes a substrate and at least one NMOS transistor having, in the substrate, an active region surrounded by an insulating region. The insulating region is formed to includes at least one area in which the insulating region has two insulating extents that are mutually separated from each other by a separation region formed by a part of the substrate. | ||
| 申请公布号 | US9263518(B2) | 申请公布日期 | 2016.02.16 |
| 申请号 | US201414300663 | 申请日期 | 2014.06.10 |
| 申请人 | STMicroelectronics (Rousset) SAS | 发明人 | Rivero Christian;Bouton Guilhem;Fornara Pascal |
| 分类号 | H01L29/78;H01L27/06;H01L29/06;H01L21/762;H01L29/66;H01L29/08;H01L23/522 | 主分类号 | H01L29/78 |
| 代理机构 | Gardere Wynne Sewell LLP | 代理人 | Gardere Wynne Sewell LLP |
| 主权项 | 1. An integrated circuit, comprising: a substrate; an insulating region delimiting an active region of the substrate, wherein said insulating region comprises: a first insulating material in a first trench that surrounds the active region; anda second insulating material in a second trench that also surrounds said active region, wherein the second trench is separated from the first trench by a separation wall formed by a portion of said substrate, wherein said separation wall discontinuously surrounds the active region so that at one or more locations around the active region the first and second trenches are connected to each other; and at least one component unfavorably sensitive to compression stresses arranged at least partially in the active region. | ||
| 地址 | Rousset FR | ||